Published in Under Review, 2024
This paper describes a resource-efficient method to practically quantify uncertainty for tinyML model-monitoring while meeting the strict tinyML constraints.
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Published in Machine Learning for Systems Workshop at NeurIPS, 2024
This paper studies explores on-device debug of field-deployed TinyML models using Hyper-dimensional computing.
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Published in International Symposium on Machine Learning for CAD, 2024
This paper studies the risks of inaccurate predictions of ML models in FPGA CAD algorithms.
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Published in International Conference on Computing Frontiers (CF23) - BEST PAPER AWARD , 2023
This paper describes a early-exit network architecture optimized for tinyML models, and presents a novel resource-efficient method to mitigate overthinking in tiny neural networks. This work recieved the ACM Best paper award.
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Published in International Conference on Field-Programmable Logic and Applications (FPL), 2021
This paper describes a novel compilation tool that enables efficient ML inference on small form-factor FPGAs for IoT applications.
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Published in ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), 2019
This paper presents SeeDot, a domain-specific language/compiler for efficiently translating ML inference into fixed-point code for execution on resource-constrained microcontrollers and FPGAs.
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Published in Topical Workshop on Electronics for Particle Physics (TWEPP), 2016, 2016
This paper presents a case study of using high-level synthesis tools to streamline the firmware development process of CMS Endcap Muon Level-1 Track finder (EMTF) at CERN’s Large Hadron Collider.
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